AN-376 Logic-System Design Techniques Reduce Switching-CMOS Power
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چکیده
By adopting certain techniques in the design of your CMOS-based logic system, you can effect dramatic reductions in the transitional power these zero-quiescent-current devices consume when switching. This article describes ways to reduce the power consumption in logic designs using high-speed CMOS ICs. The MM74HC logic family has near-zero power dissipation when in the quiescent mode. Its only substantial power drain arises from dynamic switching currents. Traditional TTL and NMOS systems do not share this low-power feature, requiring instead that you reduce power by selecting low-power ICs and external components.
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